Abstract:

A digital peak detection circuit based on FPG A is designed on J-TEXT tokamak. By using this circuit, the signal of the load current is sampled by an analog-to-digital (AD) converter, and then filtered by a FIR digital filter. The peak value of each semi sinusoidal period is picked by using peak detection algorithm, and finally, the peak current is output by a digital-to-analog (DA) converter. Based on the digital peak detection circuit, the design of the load current’s peak feedback system of the power supply is completed. Experiment results show that the system dynamic performance and accuracy can meet the needs of the AC power’s load current feedback control well.

Key words: AC power, Peak closed-loop control, FPGA, FIR filter

摘要：

在J-TEXT 装置上设计了一种基于现场可编程逻辑门阵列(FPGA)的数字式峰值检测电路，该电路先对负载电流进行模数(AD)转换，再经有限冲激响应(FIR)滤波器进行数字滤波，然后用峰值算法获取电流峰值，最后经数模转换器(DA)输出电流峰值。在此基础上，完成了扰动场交流电源负载电流峰值反馈系统的设计，实验结果表明系统动态性能好、检测精度高，能很好满足交流电源负载电流反馈控制的需要。

关键词: 交流电源, 峰值闭环控制, FPGA, FIR 滤波器