Abstract:  A reflection protection system for HL-2A lower hybrid current drive (LHCD) system was developed to improve its efficiency. The digital signal processing circuit is designed with Verilog hardware description language, and an EPM240T100C4 Complex Programmable Logic Device (CPLD) is selected for digital signal processing. A 14-bit timer is adopted to realize about 3.6ms interval for restarting the LHCD system after the protection happens. The test results show that the protection system meets the design requirements. 

Key words: HL-2A LHCD system, Passive active multi-junction launcher, Reflection protection 

摘要： 为提高 HL-2A 装置低杂波电流驱动系统的实验效率，研制了高反射保护系统。使用 Verilog 硬件描 述语言设计数字信号处理电路，选择 EPM240T100C4 型可编程逻辑器件(CPLD)实现数字信号处理；使用一个 14 位计数器，实现了在低杂波系统反射保护动作后间隔 3.6ms 后重启的功能。测试结果表明，该保护系统实现了设 计要求。

关键词: HL-2A 低杂波电流驱动系统, 无源有源多结阵列天线, 反射保护